From 3cbce1b9acb6d4a3e2a6d320394c541be25d5c81 Mon Sep 17 00:00:00 2001 From: bjorn3 <17426603+bjorn3@users.noreply.github.com> Date: Thu, 2 Apr 2026 20:29:10 +0200 Subject: [PATCH] Move BSP_READY and AP_READY to platform-independent code --- src/acpi/madt/arch/x86.rs | 3 ++- src/arch/aarch64/start.rs | 9 --------- src/arch/x86_shared/gdt.rs | 1 - src/arch/x86_shared/start.rs | 23 +---------------------- src/main.rs | 14 +++++++++++++- 5 files changed, 16 insertions(+), 34 deletions(-) diff --git a/src/acpi/madt/arch/x86.rs b/src/acpi/madt/arch/x86.rs index 0e0964fdbe..8751e9f9d3 100644 --- a/src/acpi/madt/arch/x86.rs +++ b/src/acpi/madt/arch/x86.rs @@ -9,7 +9,8 @@ use crate::{ device::local_apic::the_local_apic, memory::{allocate_p2frame, Frame, KernelMapper}, paging::{Page, PageFlags, PhysicalAddress, RmmA, RmmArch, VirtualAddress, PAGE_SIZE}, - start::{kstart_ap, AP_READY}, + start::kstart_ap, + AP_READY, }; use super::{Madt, MadtEntry}; diff --git a/src/arch/aarch64/start.rs b/src/arch/aarch64/start.rs index 6f87f7990e..08d0ad11fe 100644 --- a/src/arch/aarch64/start.rs +++ b/src/arch/aarch64/start.rs @@ -18,9 +18,6 @@ static mut BSS_TEST_ZERO: usize = 0; /// Test of non-zero values in data. static mut DATA_TEST_NONZERO: usize = 0xFFFF_FFFF_FFFF_FFFF; -pub static AP_READY: AtomicBool = AtomicBool::new(false); -static BSP_READY: AtomicBool = AtomicBool::new(false); - #[repr(C, align(16))] struct StackAlign(T); @@ -104,10 +101,6 @@ unsafe extern "C" fn start(args_ptr: *const KernelArgs) -> ! { crate::misc::init(crate::cpu_set::LogicalCpuId::new(0)); - // Reset AP variables - AP_READY.store(false, Ordering::SeqCst); - BSP_READY.store(false, Ordering::SeqCst); - // Setup kernel heap allocator::init(); @@ -131,8 +124,6 @@ unsafe extern "C" fn start(args_ptr: *const KernelArgs) -> ! { } } - BSP_READY.store(true, Ordering::SeqCst); - args.bootstrap() }; diff --git a/src/arch/x86_shared/gdt.rs b/src/arch/x86_shared/gdt.rs index 92341154d8..bdf4a6d53b 100644 --- a/src/arch/x86_shared/gdt.rs +++ b/src/arch/x86_shared/gdt.rs @@ -259,7 +259,6 @@ fn init_pcr(pcr: &mut ProcessorControlRegion, stack_end: usize) { pcr.self_ref = pcr as *mut _; // Setup the GDT. - pcr.gdt = BASE_GDT; #[cfg(target_arch = "x86")] pcr.gdt[GDT_KERNEL_PERCPU].set_offset(pcr as *const _ as u32); diff --git a/src/arch/x86_shared/start.rs b/src/arch/x86_shared/start.rs index c7920f8074..7e99426ca4 100644 --- a/src/arch/x86_shared/start.rs +++ b/src/arch/x86_shared/start.rs @@ -2,13 +2,7 @@ //! It is incredibly unsafe, and should be minimal in nature //! It must create the IDT with the correct entries, those entries are //! defined in other files inside of the `arch` module -use core::{ - arch::naked_asm, - cell::SyncUnsafeCell, - hint, - mem::offset_of, - sync::atomic::{AtomicBool, Ordering}, -}; +use core::{arch::naked_asm, cell::SyncUnsafeCell, mem::offset_of}; #[cfg(feature = "acpi")] use crate::acpi; @@ -23,9 +17,6 @@ static BSS_TEST_ZERO: SyncUnsafeCell = SyncUnsafeCell::new(0); /// Test of non-zero values in data. static DATA_TEST_NONZERO: SyncUnsafeCell = SyncUnsafeCell::new(usize::MAX); -pub static AP_READY: AtomicBool = AtomicBool::new(false); -static BSP_READY: AtomicBool = AtomicBool::new(false); - #[repr(C, align(16))] struct StackAlign(T); @@ -124,10 +115,6 @@ unsafe extern "C" fn start(args_ptr: *const KernelArgs, stack_end: usize) -> ! { // Set up syscall instruction interrupt::syscall::init(); - // Reset AP variables - AP_READY.store(false, Ordering::SeqCst); - BSP_READY.store(false, Ordering::SeqCst); - // Setup kernel heap allocator::init(); @@ -153,8 +140,6 @@ unsafe extern "C" fn start(args_ptr: *const KernelArgs, stack_end: usize) -> ! { // Initialize all of the non-core devices not otherwise needed to complete initialization device::init_noncore(); - BSP_READY.store(true, Ordering::SeqCst); - args.bootstrap() }; @@ -230,15 +215,9 @@ unsafe extern "C" fn start_ap(args_ptr: *const KernelArgsAp) -> ! { // Initialize devices (for AP) device::init_ap(); - AP_READY.store(true, Ordering::SeqCst); - args.cpu_id }; - while !BSP_READY.load(Ordering::SeqCst) { - hint::spin_loop(); - } - crate::kmain_ap(cpu_id); } } diff --git a/src/main.rs b/src/main.rs index 4397beab45..488d3a50dc 100644 --- a/src/main.rs +++ b/src/main.rs @@ -18,7 +18,10 @@ extern crate alloc; #[macro_use] extern crate bitflags; -use core::sync::atomic::{AtomicU32, Ordering}; +use core::{ + hint, + sync::atomic::{AtomicBool, AtomicU32, Ordering}, +}; use crate::context::switch::SwitchResult; @@ -136,11 +139,15 @@ struct Bootstrap { env: &'static [u8], } static BOOTSTRAP: spin::Once = spin::Once::new(); +static AP_READY: AtomicBool = AtomicBool::new(false); +static BSP_READY: AtomicBool = AtomicBool::new(false); /// This is the kernel entry point for the primary CPU. The arch crate is responsible for calling this fn kmain(bootstrap: Bootstrap) -> ! { let mut token = unsafe { CleanLockToken::new() }; + BSP_READY.store(true, Ordering::SeqCst); + //Initialize the first context, stored in kernel/src/context/mod.rs context::init(&mut token); @@ -179,6 +186,11 @@ fn kmain(bootstrap: Bootstrap) -> ! { fn kmain_ap(cpu_id: crate::cpu_set::LogicalCpuId) -> ! { let mut token = unsafe { CleanLockToken::new() }; + AP_READY.store(true, Ordering::SeqCst); + while !BSP_READY.load(Ordering::SeqCst) { + hint::spin_loop(); + } + #[cfg(feature = "profiling")] profiling::maybe_run_profiling_helper_forever(cpu_id);