diff --git a/src/acpi/hpet.rs b/src/acpi/hpet.rs index bf84d4158d..ed02c8128e 100644 --- a/src/acpi/hpet.rs +++ b/src/acpi/hpet.rs @@ -2,10 +2,7 @@ use core::{mem, ptr}; use core::ptr::{read_volatile, write_volatile}; -use crate::{ - find_one_sdt, - memory::{map_device_memory, PhysicalAddress, PAGE_SIZE}, -}; +use crate::{find_one_sdt, memory::PhysicalAddress}; use super::{sdt::Sdt, GenericAddressStructure, ACPI_TABLE}; @@ -98,9 +95,9 @@ impl Hpet { impl Hpet { pub unsafe fn map(&self) { unsafe { - map_device_memory( + crate::memory::map_device_memory( PhysicalAddress::new(self.base_address.address as usize), - PAGE_SIZE, + crate::memory::PAGE_SIZE, ); } } diff --git a/src/arch/aarch64/device/cpu/registers/id_regs.rs b/src/arch/aarch64/device/cpu/registers/id_regs.rs index a6e90993fc..83332b5cdb 100644 --- a/src/arch/aarch64/device/cpu/registers/id_regs.rs +++ b/src/arch/aarch64/device/cpu/registers/id_regs.rs @@ -1,6 +1,6 @@ //! Functions and bitfield definitions for `ID_AA64*` system registers. (e.g. `ID_AA64ISAR0_EL1`) -use core::{arch::asm, iter}; +use core::arch::asm; bitfield::bitfield! { pub struct AA64Isar0(u64); diff --git a/src/arch/aarch64/start.rs b/src/arch/aarch64/start.rs index 59edc57921..a86f6d0517 100644 --- a/src/arch/aarch64/start.rs +++ b/src/arch/aarch64/start.rs @@ -11,9 +11,7 @@ use core::{ use fdt::Fdt; -use crate::{ - allocator, arch::interrupt, device, devices::graphical_debug, dtb, paging, startup::KernelArgs, -}; +use crate::{allocator, device, devices::graphical_debug, dtb, paging, startup::KernelArgs}; /// Test of zero values in BSS. static mut BSS_TEST_ZERO: usize = 0; diff --git a/src/arch/riscv64/device/irqchip/mod.rs b/src/arch/riscv64/device/irqchip/mod.rs index c32874dd51..a6d7d2cdb5 100644 --- a/src/arch/riscv64/device/irqchip/mod.rs +++ b/src/arch/riscv64/device/irqchip/mod.rs @@ -35,7 +35,7 @@ pub unsafe fn init_clint(fdt: &Fdt) { .compatible() .unwrap() .all() - .find(|x| ((*x).eq("riscv,clint0"))) + .find(|x| (*x).eq("riscv,clint0")) .is_some()); let clint = Clint::new(clock_freq, &clint_node); diff --git a/src/arch/riscv64/interrupt/exception.rs b/src/arch/riscv64/interrupt/exception.rs index b580f2e27e..f34e151184 100644 --- a/src/arch/riscv64/interrupt/exception.rs +++ b/src/arch/riscv64/interrupt/exception.rs @@ -6,7 +6,6 @@ use crate::{ arch::{device::irqchip, start::BOOT_HART_ID}, context::signal::excp_handler, memory::GenericPfFlags, - panic::stack_trace, ptrace, sync::CleanLockToken, syscall::{self, flag::*}, diff --git a/src/arch/riscv64/start.rs b/src/arch/riscv64/start.rs index 2591272ae1..3f051ec52e 100644 --- a/src/arch/riscv64/start.rs +++ b/src/arch/riscv64/start.rs @@ -6,12 +6,7 @@ use core::{ use crate::{ allocator, - memory::Frame, - paging::{PhysicalAddress, PAGE_SIZE}, -}; - -use crate::{ - arch::{device::serial::init_early, interrupt, paging}, + arch::{device::serial::init_early, paging}, device, devices::graphical_debug, interrupt::exception_handler, diff --git a/src/context/arch/aarch64.rs b/src/context/arch/aarch64.rs index 80b3a2a970..312015095b 100644 --- a/src/context/arch/aarch64.rs +++ b/src/context/arch/aarch64.rs @@ -6,7 +6,7 @@ use crate::{ }; use core::{mem, mem::offset_of, ptr, sync::atomic::AtomicBool}; use spin::Once; -use syscall::{EnvRegisters, Error, Result, ENOMEM}; +use syscall::{EnvRegisters, Result}; /// This must be used by the kernel to ensure that context switches are done atomically /// Compare and exchange this to true when beginning a context switch on any CPU diff --git a/src/context/arch/riscv64.rs b/src/context/arch/riscv64.rs index 41fe45ff89..ab6bc89617 100644 --- a/src/context/arch/riscv64.rs +++ b/src/context/arch/riscv64.rs @@ -1,8 +1,5 @@ use crate::{ - arch::interrupt::InterruptStack, - context::context::Kstack, - memory::{KernelMapper, RmmA}, - percpu::PercpuBlock, + arch::interrupt::InterruptStack, context::context::Kstack, memory::RmmA, percpu::PercpuBlock, syscall::FloatRegisters, }; use core::{mem::offset_of, sync::atomic::AtomicBool};