From 2ab2fe7b5e190102129a34affad70d1ffe0f2259 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 15 Jun 2024 13:41:51 +0200
Subject: [PATCH] Update to pci_types 0.10.0

---
 Cargo.lock                      | 4 ++--
 pcid/Cargo.toml                 | 2 +-
 pcid/src/cfg_access/fallback.rs | 4 ----
 pcid/src/cfg_access/mod.rs      | 4 ----
 pcid/src/pci_header.rs          | 4 ----
 5 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 44fde5ca6b..df85130837 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -913,9 +913,9 @@ checksum = "7f0b59668fe80c5afe998f0c0bf93322bf2cd66cafeeb80581f291716f3467f2"
 
 [[package]]
 name = "pci_types"
-version = "0.9.1"
+version = "0.10.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d6848549f754bd20aa382ffec0f4f04ba50e55a18ff75a0862bf9e227fe42b57"
+checksum = "c4325c6aa3cca3373503b1527e75756f9fbfe5fd76be4b4c8a143ee47430b8e0"
 dependencies = [
  "bit_field",
  "bitflags 2.5.0",
diff --git a/pcid/Cargo.toml b/pcid/Cargo.toml
index 6083222d46..8e7db297ac 100644
--- a/pcid/Cargo.toml
+++ b/pcid/Cargo.toml
@@ -19,7 +19,7 @@ fdt = { git = "https://gitlab.redox-os.org/rosehuds/fdt.git" }
 libc = "0.2"
 log = "0.4"
 paw = "1.0"
-pci_types = "0.9.1"
+pci_types = "0.10"
 plain = "0.2"
 redox-log = "0.1"
 redox_syscall = "0.5"
diff --git a/pcid/src/cfg_access/fallback.rs b/pcid/src/cfg_access/fallback.rs
index c1d51bfb5c..bd073eaf27 100644
--- a/pcid/src/cfg_access/fallback.rs
+++ b/pcid/src/cfg_access/fallback.rs
@@ -56,10 +56,6 @@ impl Pci {
 }
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 impl ConfigRegionAccess for Pci {
-    fn function_exists(&self, _address: PciAddress) -> bool {
-        todo!();
-    }
-
     unsafe fn read(&self, address: PciAddress, offset: u16) -> u32 {
         let _guard = self.lock.lock().unwrap();
 
diff --git a/pcid/src/cfg_access/mod.rs b/pcid/src/cfg_access/mod.rs
index 8e0803339b..894f4f448b 100644
--- a/pcid/src/cfg_access/mod.rs
+++ b/pcid/src/cfg_access/mod.rs
@@ -318,10 +318,6 @@ impl Pcie {
 }
 
 impl ConfigRegionAccess for Pcie {
-    fn function_exists(&self, _address: PciAddress) -> bool {
-        todo!();
-    }
-
     unsafe fn read(&self, address: PciAddress, offset: u16) -> u32 {
         let _guard = self.lock.lock().unwrap();
 
diff --git a/pcid/src/pci_header.rs b/pcid/src/pci_header.rs
index 4779427aea..52ea3a512e 100644
--- a/pcid/src/pci_header.rs
+++ b/pcid/src/pci_header.rs
@@ -260,10 +260,6 @@ mod test {
     }
 
     impl ConfigRegionAccess for TestCfgAccess<'_> {
-        fn function_exists(&self, _address: PciAddress) -> bool {
-            unreachable!();
-        }
-
         unsafe fn read(&self, addr: PciAddress, offset: u16) -> u32 {
             assert_eq!(addr, self.addr);
             let offset = offset as usize;