diff --git a/src/scheme/sys/mod.rs b/src/scheme/sys/mod.rs
index 943f526215..f58fa061b8 100644
--- a/src/scheme/sys/mod.rs
+++ b/src/scheme/sys/mod.rs
@@ -170,8 +170,12 @@ impl KernelScheme for SysScheme {
             // /scheme/sys/msr/{cpu}/0x{msr} — Phase G.1: MSR R/W scheme
             // for cpufreqd and redbear-power. Open is parse-only; reads
             // and writes happen via the handle's read/write paths below.
-            let msr_path = path.strip_prefix("msr/").unwrap_or("");
-            let handle = msr::open(msr_path, _flags, _fcntl_flags, &ctx, token)?;
+            // Pass the full "msr/{cpu}/0x{msr}" path to msr::open so it
+            // can do its own strip_prefix("msr") and parse the remainder.
+            // Stripping here (the previous behavior) left "0/0x199"
+            // which msr::open's strip_prefix("msr") rejected with ENOENT,
+            // causing every MSR open to fail and cpufreqd to oscillate.
+            let handle = msr::open(path, _flags, _fcntl_flags, &ctx, token)?;
             // Store the (cpu<<32 | msr) handle in the data buffer; the
             // path string is intentionally omitted (the static array
             // version would require 'static lifetime which user_buf