diff --git a/local/recipes/gpu/redox-drm/source/src/drivers/intel/workarounds.rs b/local/recipes/gpu/redox-drm/source/src/drivers/intel/workarounds.rs
index 7c081782ba..c01a9a85bf 100644
--- a/local/recipes/gpu/redox-drm/source/src/drivers/intel/workarounds.rs
+++ b/local/recipes/gpu/redox-drm/source/src/drivers/intel/workarounds.rs
@@ -548,6 +548,35 @@ fn gen12_whitelist_build(wal: &mut WorkaroundList) {
     wa_add(wal, 0x7008, 0, 0, 0, "GEN12_CACHE_MODE_1");
 }
 
+// ---------------------------------------------------------------------------
+// Display workaround tables (from intel_display_wa.c)
+// ---------------------------------------------------------------------------
+
+pub fn build_display_workarounds(device_info: &IntelDeviceInfo) -> WorkaroundList {
+    let mut wal = WorkaroundList::new("display");
+    let gen = device_info.generation;
+
+    info!("redox-drm-intel: building display workarounds for {:?}", gen);
+
+    match gen {
+        IntelGeneration::Gen9_5 => gen11_display_wa_init(&mut wal),
+        IntelGeneration::Gen12 => gen12_display_wa_init(&mut wal),
+        _ => {}
+    }
+
+    wal
+}
+
+fn gen11_display_wa_init(wal: &mut WorkaroundList) {
+    /* Wa_14010594013:icl */
+    wa_masked_en(wal, GEN8_CHICKEN_DCPR_1, ICL_DELAY_PMRSP, "Wa_14010594013");
+}
+
+fn gen12_display_wa_init(wal: &mut WorkaroundList) {
+    /* Wa_14013723622:tgl */
+    wa_write_clr(wal, CLKREQ_POLICY, CLKREQ_POLICY_MEM_UP_OVRD, "Wa_14013723622");
+}
+
 // ---------------------------------------------------------------------------
 // Legacy top-level function kept for compatibility with existing driver init.
 // ---------------------------------------------------------------------------
@@ -556,11 +585,13 @@ pub fn apply_full_workarounds(mmio: &MmioRegion, device_info: &IntelDeviceInfo)
     let gt_wal = build_gt_workarounds(device_info);
     let ctx_wal = build_ctx_workarounds(device_info);
     let eng_wal = build_engine_workarounds(device_info);
+    let disp_wal = build_display_workarounds(device_info);
 
     let mut count = 0u32;
     count += gt_wal.apply(mmio).unwrap_or(0);
     count += ctx_wal.apply(mmio).unwrap_or(0);
     count += eng_wal.apply(mmio).unwrap_or(0);
+    count += disp_wal.apply(mmio).unwrap_or(0);
 
     info!("redox-drm-intel: {} total workarounds applied", count);
     count