Merge master into 0.2.0 (688 commits, theirs pref for conflicts)

This commit is contained in:
2026-05-21 21:37:43 +03:00
3898 changed files with 4062828 additions and 147781 deletions
+38
View File
@@ -4,6 +4,7 @@ use alloc::{
};
use core::{
cell::{Cell, RefCell},
<<<<<<< HEAD
hint,
sync::atomic::{AtomicBool, AtomicPtr, AtomicU32, AtomicU64, Ordering},
};
@@ -12,6 +13,11 @@ use core::{
/// back to a full TLB flush (CR3 reload).
const TLB_RANGE_THRESHOLD: u32 = 32;
=======
sync::atomic::{AtomicBool, AtomicPtr, Ordering},
};
>>>>>>> master
use rmm::Arch;
use syscall::PtraceFlags;
@@ -21,7 +27,11 @@ use crate::{
cpu_set::{LogicalCpuId, MAX_CPU_COUNT},
cpu_stats::{CpuStats, CpuStatsData},
ptrace::Session,
<<<<<<< HEAD
sync::{mcs::McsNode, mcs::McsRawLock, CleanLockToken},
=======
sync::CleanLockToken,
>>>>>>> master
syscall::debug::SyscallDebugInfo,
};
@@ -39,6 +49,7 @@ pub struct PercpuBlock {
pub balance: Cell<[usize; 40]>,
pub last_queue: Cell<usize>,
<<<<<<< HEAD
/// Per-CPU MCS node for the scheduler run-queue lock (RUN_CONTEXTS).
pub mcs_sched_node: McsNode,
@@ -71,6 +82,8 @@ pub struct PercpuBlock {
/// entering the spin loop, cleared upon acquisition.
pub waiting_on_lock: AtomicPtr<McsRawLock>,
=======
>>>>>>> master
// TODO: Put mailbox queues here, e.g. for TLB shootdown? Just be sure to 128-byte align it
// first to avoid cache invalidation.
pub profiling: Option<&'static crate::profiling::RingBuffer>,
@@ -94,6 +107,7 @@ pub unsafe fn init_tlb_shootdown(id: LogicalCpuId, block: *mut PercpuBlock) {
ALL_PERCPU_BLOCKS[id.get() as usize].store(block, Ordering::Release)
}
<<<<<<< HEAD
/// Get a reference to another CPU's PercpuBlock by logical CPU ID.
pub fn get_for_cpu(id: LogicalCpuId) -> Option<&'static PercpuBlock> {
unsafe {
@@ -103,6 +117,8 @@ pub fn get_for_cpu(id: LogicalCpuId) -> Option<&'static PercpuBlock> {
}
}
=======
>>>>>>> master
pub fn get_all_stats() -> Vec<(LogicalCpuId, CpuStatsData)> {
let mut res = ALL_PERCPU_BLOCKS
.iter()
@@ -147,6 +163,7 @@ pub fn shootdown_tlb_ipi(target: Option<LogicalCpuId>) {
core::hint::spin_loop();
}
}
<<<<<<< HEAD
// Full flush — clear range info (Release ordering ensures the flag
// swap and these stores are visible to the handler before the IPI).
percpublock.tlb_flush_start.store(0, Ordering::Release);
@@ -270,12 +287,26 @@ impl PercpuBlock {
}
}
=======
crate::ipi::ipi_single(crate::ipi::IpiKind::Tlb, percpublock);
} else {
for id in 0..crate::cpu_count() {
// TODO: Optimize: use global counter and percpu ack counters, send IPI using
// destination shorthand "all CPUs".
shootdown_tlb_ipi(Some(LogicalCpuId::new(id)));
}
}
}
impl PercpuBlock {
>>>>>>> master
pub fn maybe_handle_tlb_shootdown(&self) {
#[expect(clippy::bool_comparison)]
if self.wants_tlb_shootdown.swap(false, Ordering::Relaxed) == false {
return;
}
<<<<<<< HEAD
let start = self.tlb_flush_start.load(Ordering::Acquire);
let count = self.tlb_flush_count.load(Ordering::Acquire);
@@ -289,6 +320,10 @@ impl PercpuBlock {
// Full TLB flush (CR3 reload) for large ranges or global shootdowns.
crate::memory::RmmA::invalidate_all();
}
=======
// TODO: Finer-grained flush
crate::memory::RmmA::invalidate_all();
>>>>>>> master
if let Some(addrsp) = &*self.current_addrsp.borrow() {
addrsp.tlb_ack.fetch_add(1, Ordering::Release);
@@ -358,6 +393,7 @@ impl PercpuBlock {
wants_tlb_shootdown: AtomicBool::new(false),
balance: Cell::new([0; 40]),
last_queue: Cell::new(39),
<<<<<<< HEAD
mcs_sched_node: McsNode::new(),
mcs_contention_count: Cell::new(0),
tlb_flush_start: AtomicU64::new(0),
@@ -366,6 +402,8 @@ impl PercpuBlock {
current_prio: Cell::new(39),
numa_node: Cell::new(u8::MAX),
waiting_on_lock: AtomicPtr::new(core::ptr::null_mut()),
=======
>>>>>>> master
ptrace_flags: Cell::new(PtraceFlags::empty()),
ptrace_session: RefCell::new(None),
inside_syscall: Cell::new(false),