From 07d4ae0e605d1c3ed7a6917c2b1c1481cb4ca6f2 Mon Sep 17 00:00:00 2001
From: 4lDO2 <4lDO2@protonmail.com>
Date: Wed, 22 Apr 2020 18:31:18 +0200
Subject: [PATCH] Recognize the AHCI-specific SATA PCI capability.

---
 pcid/src/pci/cap.rs | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/pcid/src/pci/cap.rs b/pcid/src/pci/cap.rs
index 14714cb7e9..dfbb6a1feb 100644
--- a/pcid/src/pci/cap.rs
+++ b/pcid/src/pci/cap.rs
@@ -41,6 +41,7 @@ pub enum CapabilityId {
     Msi = 0x05,
     MsiX = 0x11,
     Pcie = 0x10,
+    Sata = 0x12, // only on AHCI functions
 }
 
 #[derive(Clone, Copy, Debug, Eq, Hash, PartialEq, Serialize, Deserialize)]
@@ -85,11 +86,12 @@ pub struct MsixCapability {
     pub c: u32,
 }
 
-#[derive(Clone, Copy, Debug, Eq, Hash, PartialEq)]
+#[derive(Clone, Debug, Eq, Hash, PartialEq)]
 pub enum Capability {
     Msi(MsiCapability),
     MsiX(MsixCapability),
     Pcie(PcieCapability),
+    FunctionSpecific(u8, Vec<u8>), // TODO: Arrayvec
     Other(u8),
 }
 
@@ -156,6 +158,8 @@ impl Capability {
             Self::parse_msix(reader, offset)
         } else if capability_id == CapabilityId::Pcie as u8 {
             Self::parse_pcie(reader, offset)
+        } else if capability_id == CapabilityId::Sata as u8 {
+            Self::FunctionSpecific(capability_id, reader.read_range(offset.into(), 8))
         } else {
             Self::Other(capability_id)
             //panic!("unimplemented or malformed capability id: {}", capability_id)