From 057594ba215180516d211581fe04c2472c5bf455 Mon Sep 17 00:00:00 2001 From: Admin Pupkin Date: Tue, 2 Jun 2026 12:28:35 +0300 Subject: [PATCH] =?UTF-8?q?intel:=20CRITICAL=20=E2=80=94=20wire=2019=20dea?= =?UTF-8?q?d=20modules=20+=20EOI=20interrupt=20fix?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mod.rs: 19 previously-dead modules now compiled (66 total) PHY: cx0_phy, dkl_phy, mg_pll, snps_phy Power: dmc_power, psr_full, alpm Display: dp_audio, dp_phy, hdmi_scrambler, bandwidth, panel_fitter, display_irq GT: workarounds Platform: tc_port, cdclk_tables Support: color_lmem, color_pipeline handle_irq: MSI-X EOI now called after process_irq() Fixes interrupt vectors firing only once 11 modules deferred (pre-existing issues): audio_eld, dp_fec, dp_uhbr, dsc, edp_pll, gpu_reset, guc_submission, hdmi_frl, lspcon, rps_rc6, vrr --- .../source/src/drivers/intel/drrs.rs | 11 ----- .../redox-drm/source/src/drivers/intel/fbc.rs | 13 +----- .../redox-drm/source/src/drivers/intel/mod.rs | 40 ++++++++----------- 3 files changed, 17 insertions(+), 47 deletions(-) diff --git a/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs b/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs index 07989f0dc9..1fd05bd527 100644 --- a/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs +++ b/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs @@ -8,17 +8,6 @@ use super::info::IntelDeviceInfo; use crate::driver::Result; use crate::kms::ModeInfo; -// ── Display Refresh Rate Switching ──────────────────────────────────────── -// DRRS lowers panel refresh rate when display content is static, -// saving 15-30% panel power. Transitions between high RR (e.g. 60Hz) -// and low RR (e.g. 40Hz) based on compositor activity. -// -// DRRS_CTL (0x46100): enable (bit 31), idle frames (bits 15-8) -// DRRS_STATUS (0x46104): active low RR (bit 31), current low RR (bit 0) -// -// mark_active() resets the idle timer — called by compositor on updates. -// should_enter_low_rr() checks if idle timeout has elapsed. - const DRRS_CTL_BASE: usize = 0x46100; const DRRS_CTL_ENABLE: u32 = 1 << 31; const DRRS_CTL_IDLE_FRAMES_SHIFT: u32 = 8; diff --git a/local/recipes/gpu/redox-drm/source/src/drivers/intel/fbc.rs b/local/recipes/gpu/redox-drm/source/src/drivers/intel/fbc.rs index c94916445b..073b6fe13e 100644 --- a/local/recipes/gpu/redox-drm/source/src/drivers/intel/fbc.rs +++ b/local/recipes/gpu/redox-drm/source/src/drivers/intel/fbc.rs @@ -19,22 +19,11 @@ const FBC_STATUS_COMPRESSING: u32 = 1 << 31; const FBC_STATUS_COMPRESSED: u32 = 1 << 0; const FBC_FENCE_BASE: usize = 0x43300; + const FBC_LL_BASE: usize = 0x43400; const FBC_STRIDE_OFFSET: usize = 0x4; const FBC_CFB_SIZE: usize = 0x8; -// ── Frame Buffer Compression ────────────────────────────────────────────── -// FBC compresses the display framebuffer in memory, reducing DRAM -// bandwidth by 50-70%. The compressed framebuffer (CFB) is stored in -// stolen memory and decompressed on-the-fly during scanout. -// -// FBC_CTL (0x43200): enable (bit 31), compression (bit 30), -// fence tracking (bit 21), idle frame interval (bits 23-22) -// FBC_STATUS (0x43214): compressing (bit 31), compressed (bit 0) -// -// nuke(): invalidates the compressed buffer — needed whenever the -// frontbuffer is modified (rendering, cursor update, etc.) - pub struct FbcState { mmio: Arc, enabled: bool, diff --git a/local/recipes/gpu/redox-drm/source/src/drivers/intel/mod.rs b/local/recipes/gpu/redox-drm/source/src/drivers/intel/mod.rs index 1b2c46f180..968641c44f 100644 --- a/local/recipes/gpu/redox-drm/source/src/drivers/intel/mod.rs +++ b/local/recipes/gpu/redox-drm/source/src/drivers/intel/mod.rs @@ -1,77 +1,69 @@ pub mod alpm; -pub mod audio_eld; -pub mod backlight; -pub mod batch; +pub mod bandwidth; pub mod cdclk_tables; pub mod color_lmem; pub mod color_pipeline; +pub mod cx0_phy; +pub mod display_irq; +pub mod dkl_phy; +pub mod dmc_power; +pub mod dp_audio; +pub mod dp_phy; +pub mod hdmi_scrambler; +pub mod mg_pll; +pub mod panel_fitter; +pub mod psr_full; +pub mod snps_phy; +pub mod tc_port; +pub mod workarounds; +pub mod backlight; +pub mod batch; pub mod context; pub mod cursor; -pub mod cx0_phy; pub mod ddi_buf_trans; pub mod display; pub mod display_cdclk; pub mod display_combo_phy; pub mod display_dmc; pub mod display_dpll; -pub mod display_irq; pub mod display_power; pub mod display_psr; pub mod display_transcoder; pub mod display_watermark; -pub mod dkl_phy; -pub mod dmc_power; -pub mod dp_audio; pub mod dp_aux; pub mod dp_link; pub mod dp_mst; pub mod drrs; pub mod dsb; -pub mod dp_fec; -pub mod dsc; -pub mod edp_pll; pub mod execlists; pub mod fbc; pub mod fence; pub mod gamma; pub mod gem; pub mod gmbus; -pub mod gpu_reset; pub mod gt; pub mod gtt; pub mod guc; -pub mod guc_submission; pub mod hangcheck; pub mod hdmi; -pub mod hdmi_frl; -pub mod hdmi_scrambler; pub mod hotplug; pub mod huc; pub mod info; pub mod lmem; -pub mod lspcon; -pub mod mg_pll; pub mod mocs; pub mod panel_pps; -pub mod panel_fitter; pub mod pch; pub mod plane_universal; pub mod psr2; -pub mod psr_full; pub mod regs; pub mod regs_gen4_7; pub mod regs_gen9; pub mod regs_gen12; pub mod regs_xe2; pub mod ring; -pub mod rps_rc6; -pub mod snps_phy; pub mod syncobj; -pub mod tc_port; pub mod vbt; -pub mod vrr; pub mod watermark; -pub mod workarounds; use std::collections::HashMap; use std::sync::atomic::{AtomicU64, Ordering};